Hybrid Orientation Membranes and Wires

High-performance CMOS (complementary metal oxide semiconductor) devices, use both n-type and p-type channels.  In the case of Si(001) the hole mobility is much less than the electron mobility, requiring p-type regions at least three times larger than the n-type channels to compensate. By fabricating p-type channels in Si(110), the hole mobility is given a boost, and by tensilely straining Si(110), the mobility boost is even larger. Mixing these two orientations on a single surface (hybrid-orientation technology: HOT) provides a way of reducing the current drive imbalance between n-type and p-type channels. Using membrane transfer and overgrowth, we fabricate HOT nanomembranes (NM) composed of regions of Si(001) and Si(110), including tensilely strained Si(110). This provides a material that is both flexible and transferable, and suitable for high-performance CMOS on a variety of host surfaces.

Normalized strain energy contours on the surface
	  opposite a dot
Figure 1. HOT incorporating dislocation-free strained Si(110) (see strained Si(110) for more details) Differential growth rates for Si(001) and Si(110) during chemical vapor deposition are used to produce a planar structure without CMP.


  Figure 2. Optical micrograph of a HOT membrane on a TEM grid. The green regions are Si(001) and the pink regions are Si(110)- the copper grid in the back ground is the TEM grid.  


We are currently investigating the structure (Deborah Paskiewicz) of the interfaces where the two crystallographic orientations meet during growth with AFM, SEM, and TEM.  Mixed orientation and composition membranes are also being turned into nanowires and the boundaries between the two different regions will be investigated for modified electronic properties arising from scattering at the boundary interfaces (Hyuk-Ju Ryu).  Many different composition, strain, and orientation combinations are possible here, and it will be interesting to probe the transport properties when carriers traverse a modulated structure where they are slowed down, sped up, and influenced by different scattering mechanisms at the interfaces (also see thermoelectrics).


  Figure 3. Schematic of a mixed orientation membrane processed into a nanowire: This architecture has the potential for massively parallel processing in the absence of post-growth nanowire positioning.




Author: Shelley Scott

S. A. Scott, D. M. Paskiewicz, D. E. Savage, and M. G. Lagally “Silicon Nanomembranes Incorporating Mixed Crystal OrientationsECS trans., 16 (2008) 215


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